Jumper Tested Devices
RL1R16
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RL1R16 | B1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 288 | CLKREQ__LAN1 |
| 2 | 690 | CLKREQ__LAN1_R |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 976 | RL1R16 | 2.000 | 1.000 | 0 | J | 288 | 690 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RL1R83
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RL1R83 | A1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 692 | S_WAKE__LAN1 |
| 2 | 657 | LAN_SIO_WAKE_ |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 977 | RL1R83 | 2.000 | 1.000 | 0 | J | 692 | 657 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RL1R89
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RL1R89 | B1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 686 | +3VSB_LAN1 |
| 2 | 706 | +3VSB_ATX |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 978 | RL1R89 | 2.000 | 1.000 | 0 | J | 686 | 706 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
LPL111
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| LPL111 | E2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1320 | P_VCORE_PHASE1_20 |
| 2 | 1181 | VCORE |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2519 | LPL111 | 1.000 | 1.000 | 0 | J | 1320 | 1181 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
LPL121
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| LPL121 | E2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1319 | P_VCORE_PHASE2_20 |
| 2 | 1181 | VCORE |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2520 | LPL121 | 1.000 | 1.000 | 0 | J | 1319 | 1181 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
LPL131
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| LPL131 | D2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1199 | P_VCORE_PHASE3_20 |
| 2 | 1181 | VCORE |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2521 | LPL131 | 1.000 | 1.000 | 0 | J | 1199 | 1181 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
LPL201
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| LPL201 | F2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1657 | P_GT_PHASE1_20 |
| 2 | 1340 | VCCGT |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2522 | LPL201 | 1.000 | 1.000 | 0 | J | 1657 | 1340 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
LPL202
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| LPL202 | F2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1671 | P_GT_PHASE2_20 |
| 2 | 1340 | VCCGT |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2523 | LPL202 | 1.000 | 1.000 | 0 | J | 1671 | 1340 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
LPL504
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| LPL504 | F4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1229 | +5VSB_DUAL |
| 2 | 1495 | P_VDDQ_REGIN_S |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2524 | LPL504 | 1.000 | 1.000 | 0 | J | 1229 | 1495 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
LPL511
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| LPL511 | E4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1490 | P_VDDQ_PHASE_20 |
| 2 | 1108 | VDDQ |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2525 | LPL511 | 1.000 | 1.000 | 0 | J | 1490 | 1108 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
LPL703
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| LPL703 | B4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 433 | P_+1_0V_A_SW_20 |
| 2 | 501 | +1_0V_A |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2526 | LPL703 | 1.000 | 1.000 | 0 | J | 433 | 501 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
LPL704
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| LPL704 | D2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1198 | P_VCCSA_PHASE_20 |
| 2 | 1184 | VCCSA |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2527 | LPL704 | 1.000 | 1.000 | 0 | J | 1198 | 1184 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
LPL706
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| LPL706 | B4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 423 | +5VSB |
| 2 | 421 | P_1_0A_L+5VSB_S |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2528 | LPL706 | 1.000 | 1.000 | 0 | J | 423 | 421 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
LD3F2
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| LD3F2 | C4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 933 | VDDSPD |
| 2 | 164 | +3V_ATX |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2508 | LD3F2 | 1.000 | 1.000 | 0 | J | 933 | 164 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RU31PU5R9
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RU31PU5R9 | D1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 634 | +3VSB |
| 2 | 1243 | +3VSD_U3C1 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 936 | RU31PU5R9 | 2.000 | 1.000 | 0 | J | 634 | 1243 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RU31U6R1
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RU31U6R1 | C1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 765 | U3C1_DFP_CC1_HREF |
| 2 | 753 | N21574411 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 954 | RU31U6R1 | 2.000 | 1.000 | 0 | J | 765 | 753 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RU31U6R14
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RU31U6R14 | C2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 791 | N21574180 |
| 2 | 769 | U3C1_DFP_CC2_HREF |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 979 | RU31U6R14 | 2.000 | 1.000 | 0 | J | 791 | 769 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RU31U6R7
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RU31U6R7 | C1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 746 | N21438374 |
| 2 | 767 | U3C1_DFP_CC1_O |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 931 | RU31U6R7 | 2.000 | 1.000 | 0 | J | 746 | 767 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RU31U6R8
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RU31U6R8 | C2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 792 | N21438381 |
| 2 | 793 | U3C1_DFP_CC2_O |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 932 | RU31U6R8 | 2.000 | 1.000 | 0 | J | 792 | 793 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RU3CR20
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RU3CR20 | C2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 768 | U3C1_PSW_OC_ |
| 2 | 797 | S_USB3_OC_6 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 906 | RU3CR20 | 2.000 | 1.000 | 0 | J | 768 | 797 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
LU3EF4
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| LU3EF4 | D1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1229 | +5VSB_DUAL |
| 2 | 1254 | +5V_U3E_P1 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2560 | LU3EF4 | 1.000 | 1.000 | 0 | J | 1229 | 1254 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
JAAFP
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| JAAFP | A1 | T | 9 | 1 | 11.1 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 59 | A_FMIC1_L |
| 2 | 729 | A_GND |
| 3 | 60 | A_FMIC1_R |
| 4 | 58 | NC_1945 |
| 5 | 61 | A_HPOUT_R |
| 6 | 62 | A_JD_FMIC1 |
| 7 | 63 | A_JD_FRONT |
| 8 | 64 | A_HPOUT_L |
| 9 | 65 | A_JD_HPOUT |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 25 | JAAFP_1 | 1.000 | 1.000 | 0 | J | 1793 | 59 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 120 | JAAFP_1_2 | 4.000 | 4.000 | 0 | J | 59 | 729 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 209 | JAAFP_2_3 | 4.000 | 4.000 | 0 | J | 729 | 60 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 283 | JAAFP_3_4 | 4.000 | 4.000 | 0 | J | 60 | 58 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 284 | JAAFP_4_5 | 4.000 | 4.000 | 0 | J | 58 | 61 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 285 | JAAFP_5_6 | 4.000 | 4.000 | 0 | J | 61 | 62 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 286 | JAAFP_6_7 | 4.000 | 4.000 | 0 | J | 62 | 63 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 287 | JAAFP_7_8 | 4.000 | 4.000 | 0 | J | 63 | 64 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 288 | JAAFP_8_9 | 4.000 | 4.000 | 0 | J | 64 | 65 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 289 | JAAFP_9_1 | 4.000 | 4.000 | 0 | J | 59 | 65 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 |
LAGL1
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| LAGL1 | A1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 423 | +5VSB |
| 2 | 57 | +5VA_IN |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2491 | LAGL1 | 1.000 | 1.000 | 0 | J | 423 | 57 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RAR18
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RAR18 | A1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 44 | +DVDD_IO |
| 2 | 634 | +3VSB |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 961 | RAR18 | 2.000 | 1.000 | 0 | J | 44 | 634 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
JATX12V
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| JATX12V | F2 | T | 5 | 4 | 80.0 | No Test Nail |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1 | GND |
| 2 | 1 | GND |
| 3 | 1316 | +12V_CPU |
| 4 | 1316 | +12V_CPU |
| 5 | 0 | NC_1816 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 26 | JATX12V_1 | 1.000 | 1.000 | 0 | J | 1813 | 1 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 27 | JATX12V_2 | 1.000 | 1.000 | 0 | J | 1810 | 1 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 28 | JATX12V_3 | 1.000 | 1.000 | 0 | J | 1812 | 1316 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 29 | JATX12V_4 | 1.000 | 1.000 | 0 | J | 1811 | 1316 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 290 | JATX12V_1_2/N | 4.000 | 4.000 | 0 | J | 1 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 291 | JATX12V_2_3/C | 4.000 | 4.000 | 0 | J | 1 | 1316 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 292 | JATX12V_3_4/N | 4.000 | 4.000 | 0 | J | 1316 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 293 | JATX12V/NP_4 | 4.000 | 4.000 | 0 | J | 1316 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 294 | JATX12V/NP_5 | 4.000 | 4.000 | 0 | J | 1 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA |
JCHAFAN1
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| JCHAFAN1 | F3 | T | 5 | 4 | 80.0 | No Test Nail |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1581 | O_CHAFAN_PWM_Q |
| 2 | 1580 | O_CHAFANIN1_R |
| 3 | 1579 | CHAFANPWR |
| 4 | 1 | GND |
| 5 | 0 | NC_1965 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 12 | JCHAFAN1 | 1.000 | 1.000 | 0 | J | 1831 | 1832 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 30 | JCHAFAN1_1 | 1.000 | 1.000 | 0 | J | 1818 | 1581 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 31 | JCHAFAN1_2 | 1.000 | 1.000 | 0 | J | 1819 | 1580 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 32 | JCHAFAN1_3 | 1.000 | 1.000 | 0 | J | 1820 | 1579 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 33 | JCHAFAN1_4 | 1.000 | 1.000 | 0 | J | 1821 | 1 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 100 | JCHAFAN1_1_2 | 4.000 | 4.000 | 0 | J | 1581 | 1580 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 101 | JCHAFAN1_2_3 | 4.000 | 4.000 | 0 | J | 1580 | 1579 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 102 | JCHAFAN1_3_4 | 4.000 | 4.000 | 0 | J | 1579 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 103 | JCHAFAN1/NP_ | 4.000 | 4.000 | 0 | J | 1 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 104 | JCHAFAN1/NP_ | 4.000 | 4.000 | 0 | J | 1581 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA |
JCHAFAN2
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| JCHAFAN2 | C1 | T | 5 | 4 | 80.0 | No Test Nail |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 743 | O_CHAFAN_PWM2_Q |
| 2 | 744 | O_CHAFANIN2_R |
| 3 | 745 | CHAFANPWR2 |
| 4 | 1 | GND |
| 5 | 0 | NC_1966 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 10 | JCHAFAN2 | 1.000 | 1.000 | 0 | J | 1827 | 1828 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 34 | JCHAFAN2_1 | 1.000 | 1.000 | 0 | J | 1809 | 743 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 35 | JCHAFAN2_2 | 1.000 | 1.000 | 0 | J | 1808 | 744 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 36 | JCHAFAN2_3 | 1.000 | 1.000 | 0 | J | 1807 | 745 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 37 | JCHAFAN2_4 | 1.000 | 1.000 | 0 | J | 1806 | 1 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 105 | JCHAFAN2_1_2 | 4.000 | 4.000 | 0 | J | 743 | 744 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 106 | JCHAFAN2_2_3 | 4.000 | 4.000 | 0 | J | 744 | 745 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 107 | JCHAFAN2_3_4 | 4.000 | 4.000 | 0 | J | 745 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 108 | JCHAFAN2/NP_ | 4.000 | 4.000 | 0 | J | 1 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 109 | JCHAFAN2/NP_ | 4.000 | 4.000 | 0 | J | 743 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA |
JCLRTC
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| JCLRTC | A3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 292 | +3V_BAT_RTC |
| 2 | 1 | GND |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 38 | JCLRTC_1 | 1.000 | 1.000 | 0 | J | 1802 | 292 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 39 | JCLRTC_2 | 1.000 | 1.000 | 0 | J | 1803 | 1 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 110 | JCLRTC | 4.000 | 4.000 | 0 | J | 292 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 |
JCOM
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| JCOM | A2 | T | 9 | 1 | 11.1 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 105 | LS_COM1_DCD1_ |
| 2 | 104 | LS_COM1_RXD1 |
| 3 | 106 | LS_COM1_TXD1 |
| 4 | 107 | LS_COM1_DTR1_ |
| 5 | 1 | GND |
| 6 | 108 | LS_COM1_DSR1_ |
| 7 | 110 | LS_COM1_RTS1_ |
| 8 | 109 | LS_COM1_CTS1_ |
| 9 | 111 | LS_COM1_RI1_ |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 40 | JCOM_1 | 1.000 | 1.000 | 0 | J | 1797 | 105 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 111 | JCOM_1_2 | 4.000 | 4.000 | 0 | J | 105 | 104 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 112 | JCOM_2_3 | 4.000 | 4.000 | 0 | J | 104 | 106 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 113 | JCOM_3_4 | 4.000 | 4.000 | 0 | J | 106 | 107 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 114 | JCOM_4_5 | 4.000 | 4.000 | 0 | J | 107 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 115 | JCOM_5_6 | 4.000 | 4.000 | 0 | J | 1 | 108 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 116 | JCOM_6_7 | 4.000 | 4.000 | 0 | J | 108 | 110 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 117 | JCOM_7_8 | 4.000 | 4.000 | 0 | J | 110 | 109 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 118 | JCOM_8_9 | 4.000 | 4.000 | 0 | J | 109 | 111 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 119 | JCOM_9_1 | 4.000 | 4.000 | 0 | J | 105 | 111 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 |
JCPUFAN
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| JCPUFAN | F2 | T | 5 | 4 | 80.0 | No Test Nail |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1653 | O_CPUFAN_PWM_Q |
| 2 | 1652 | O_CPUFANIN_R |
| 3 | 4 | +12V |
| 4 | 1 | GND |
| 5 | 0 | NC_1967 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 11 | JCPUFAN | 4.000 | 4.000 | 0 | J | 1829 | 1830 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 41 | JCPUFAN_1 | 1.000 | 1.000 | 0 | J | 1814 | 1653 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 42 | JCPUFAN_2 | 1.000 | 1.000 | 0 | J | 1815 | 1652 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 43 | JCPUFAN_3 | 1.000 | 1.000 | 0 | J | 1816 | 4 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 44 | JCPUFAN_4 | 1.000 | 1.000 | 0 | J | 1817 | 1 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 121 | JCPUFAN_1_2 | 4.000 | 4.000 | 0 | J | 1653 | 1652 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 122 | JCPUFAN_2_3 | 4.000 | 4.000 | 0 | J | 1652 | 4 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 123 | JCPUFAN_3_4/C | 4.000 | 4.000 | 0 | J | 4 | 1 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 124 | JCPUFAN/NP_4 | 4.000 | 4.000 | 0 | J | 1 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 125 | JCPUFAN/NP_5 | 4.000 | 4.000 | 0 | J | 1653 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA |
JEATXPWR
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| JEATXPWR | D4 | T | 26 | 4 | 15.4 | No Test Nail |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 164 | +3V_ATX |
| 2 | 164 | +3V_ATX |
| 3 | 1 | GND |
| 4 | 3 | +5V |
| 5 | 1 | GND |
| 6 | 3 | +5V |
| 7 | 1 | GND |
| 8 | 969 | P_PWROK_PS |
| 9 | 970 | +5VSB_ATX |
| 10 | 4 | +12V |
| 11 | 4 | +12V |
| 12 | 164 | +3V_ATX |
| 13 | 164 | +3V_ATX |
| 14 | 5 | -12V |
| 15 | 1 | GND |
| 16 | 967 | ATX_PSON__R |
| 17 | 1 | GND |
| 18 | 1 | GND |
| 19 | 1 | GND |
| 20 | 968 | -5V |
| 21 | 3 | +5V |
| 22 | 3 | +5V |
| 23 | 3 | +5V |
| 24 | 1 | GND |
| 25 | 0 | NC_1968 |
| 26 | 0 | NC_1969 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 45 | JEATXPWR_1 | 1.000 | 1.000 | 0 | J | 1805 | 164 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 158 | JEATXPWR_1_2/ | 4.000 | 4.000 | 0 | J | 164 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 159 | JEATXPWR_2_3/ | 4.000 | 4.000 | 0 | J | 164 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 160 | JEATXPWR_3_4/ | 4.000 | 4.000 | 0 | J | 1 | 3 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 161 | JEATXPWR_4_5/ | 4.000 | 4.000 | 0 | J | 3 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 162 | JEATXPWR_5_6/ | 4.000 | 4.000 | 0 | J | 1 | 3 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 163 | JEATXPWR_6_7/ | 4.000 | 4.000 | 0 | J | 3 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 164 | JEATXPWR_7_8 | 4.000 | 4.000 | 0 | J | 1 | 969 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 165 | JEATXPWR_8_9 | 4.000 | 4.000 | 0 | J | 969 | 970 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 166 | JEATXPWR_9_1/ | 4.000 | 4.000 | 0 | J | 970 | 4 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 167 | JEATXPWR_10_/ | 4.000 | 4.000 | 0 | J | 4 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 168 | JEATXPWR_11_ | 4.000 | 4.000 | 0 | J | 4 | 164 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 169 | JEATXPWR_12_/ | 4.000 | 4.000 | 0 | J | 164 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 170 | JEATXPWR_13_ | 4.000 | 4.000 | 0 | J | 164 | 5 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 171 | JEATXPWR_14_ | 4.000 | 4.000 | 0 | J | 5 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 172 | JEATXPWR_15_/ | 4.000 | 4.000 | 0 | J | 1 | 967 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 173 | JEATXPWR_16_/ | 4.000 | 4.000 | 0 | J | 967 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 174 | JEATXPWR_17_/ | 4.000 | 4.000 | 0 | J | 1 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 175 | JEATXPWR_18_/ | 4.000 | 4.000 | 0 | J | 1 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 176 | JEATXPWR_19_ | 4.000 | 4.000 | 0 | J | 1 | 968 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 177 | JEATXPWR_20_ | 4.000 | 4.000 | 0 | J | 968 | 3 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 178 | JEATXPWR_21_/ | 4.000 | 4.000 | 0 | J | 3 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 179 | JEATXPWR_22_/ | 4.000 | 4.000 | 0 | J | 3 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 180 | JEATXPWR_23_/ | 4.000 | 4.000 | 0 | J | 3 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 181 | JEATXPWR/NP_ | 4.000 | 4.000 | 0 | J | 1 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 182 | JEATXPWR/NP_ | 4.000 | 4.000 | 0 | J | 0 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 183 | JEATXPWR/NP_ | 4.000 | 4.000 | 0 | J | 164 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA |
LGF1
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| LGF1 | D1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1279 | +5V_DVI_HDMI_Q |
| 2 | 1282 | +5V_DVI_HDMI |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2509 | LGF1 | 1.000 | 1.000 | 0 | J | 1279 | 1282 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
LGF6
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| LGF6 | F1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1705 | +V_5V |
| 2 | 1717 | +5V_D_VGA |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2510 | LGF6 | 1.000 | 1.000 | 0 | J | 1705 | 1717 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
LGL32
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| LGL32 | E1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1295 | VGA_RED |
| 2 | 1290 | VGA_RED_L |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2511 | LGL32 | 1.000 | 1.000 | 0 | J | 1295 | 1290 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
LGL33
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| LGL33 | E1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1293 | VGA_GREEN |
| 2 | 1291 | VGA_GREEN_L |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2512 | LGL33 | 1.000 | 1.000 | 0 | J | 1293 | 1291 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
LGL34
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| LGL34 | E1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1296 | VGA_BLUE |
| 2 | 1292 | VGA_BLUE_L |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2513 | LGL34 | 1.000 | 1.000 | 0 | J | 1296 | 1292 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RGR1504
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RGR1504 | F1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1701 | VGA_HSYNC |
| 2 | 1287 | VGA_HSYNC_R |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 912 | RGR1504 | 2.000 | 1.000 | 0 | J | 1701 | 1287 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RGR1505
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RGR1505 | F1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1700 | VGA_VSYNC |
| 2 | 1718 | VGA_VSYNC_R |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 913 | RGR1505 | 2.000 | 1.000 | 0 | J | 1700 | 1718 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RGR200
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RGR200 | E1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 2 | +3V |
| 2 | 1298 | +3V_DVI |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 914 | RGR200 | 2.000 | 1.000 | 0 | J | 2 | 1298 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RGR78
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RGR78 | E1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1305 | SQ_EN2 |
| 2 | 1 | GND |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 925 | RGR78 | 2.000 | 1.000 | 0 | J | 1305 | 1 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RGR79
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RGR79 | E1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1303 | DC_EN2 |
| 2 | 1 | GND |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 926 | RGR79 | 2.000 | 1.000 | 0 | J | 1303 | 1 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
JLANU334
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| JLANU334 | D1 | T | 38 | 8 | 21.1 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1274 | +5V_USB3_P34 |
| 2 | 1271 | S_U2DN4 |
| 3 | 1270 | S_U2DP4 |
| 4 | 1 | GND |
| 5 | 715 | S_U3RXDN4 |
| 6 | 1269 | S_U3RXDP4 |
| 7 | 1 | GND |
| 8 | 1272 | S_U3TXDN4 |
| 9 | 1273 | S_U3TXDP4 |
| 10 | 1274 | +5V_USB3_P34 |
| 11 | 1266 | S_U2DN3 |
| 12 | 1267 | S_U2DP3 |
| 13 | 1 | GND |
| 14 | 716 | S_U3RXDN3 |
| 15 | 1268 | S_U3RXDP3 |
| 16 | 1 | GND |
| 17 | 1265 | S_U3TXDN3 |
| 18 | 1264 | S_U3TXDP3 |
| 19 | 734 | L1_TR_P0 |
| 20 | 1249 | L1_TR_N0 |
| 21 | 1248 | L1_TR_P1 |
| 22 | 1250 | L1_TR_P2 |
| 23 | 1247 | L1_TR_N2 |
| 24 | 1251 | L1_TR_N1 |
| 25 | 1246 | L1_TR_P3 |
| 26 | 1252 | L1_TR_N3 |
| 27 | 1244 | L1_ACTLEDP |
| 28 | 1245 | L1_ACTLEDN |
| 29 | 735 | L1_LINK1000_ |
| 30 | 736 | L1_LINK100_ |
| 31 | 1 | GND |
| 32 | 1 | GND |
| 33 | 1 | GND |
| 34 | 1 | GND |
| 35 | 1 | GND |
| 36 | 1 | GND |
| 37 | 1 | GND |
| 38 | 1 | GND |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 228 | JLANU334_1_2 | 4.000 | 4.000 | 0 | J | 1274 | 1271 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 229 | JLANU334_2_3 | 4.000 | 4.000 | 0 | J | 1271 | 1270 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 230 | JLANU334_3_4 | 4.000 | 4.000 | 0 | J | 1270 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 231 | JLANU334_4_5 | 4.000 | 4.000 | 0 | J | 1 | 715 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 232 | JLANU334_5_6 | 4.000 | 4.000 | 0 | J | 715 | 1269 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 233 | JLANU334_6_7 | 4.000 | 4.000 | 0 | J | 1269 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 234 | JLANU334_7_8 | 4.000 | 4.000 | 0 | J | 1 | 1272 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 235 | JLANU334_8_9 | 4.000 | 4.000 | 0 | J | 1272 | 1273 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 236 | JLANU334_9_1 | 4.000 | 4.000 | 0 | J | 1273 | 1274 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 237 | JLANU334_10_ | 4.000 | 4.000 | 0 | J | 1274 | 1266 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 238 | JLANU334_11_ | 4.000 | 4.000 | 0 | J | 1266 | 1267 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 239 | JLANU334_12_ | 4.000 | 4.000 | 0 | J | 1267 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 240 | JLANU334_13_ | 4.000 | 4.000 | 0 | J | 1 | 716 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 241 | JLANU334_14_ | 4.000 | 4.000 | 0 | J | 716 | 1268 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 242 | JLANU334_15_ | 4.000 | 4.000 | 0 | J | 1268 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 243 | JLANU334_16_ | 4.000 | 4.000 | 0 | J | 1 | 1265 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 244 | JLANU334_17_ | 4.000 | 4.000 | 0 | J | 1265 | 1264 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 245 | JLANU334_18_ | 4.000 | 4.000 | 0 | J | 1264 | 734 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 246 | JLANU334_19_ | 1.000 | 1.000 | 0 | J | 734 | 1249 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 247 | JLANU334_20_ | 1.000 | 1.000 | 0 | J | 1249 | 1248 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 248 | JLANU334_21_ | 1.000 | 1.000 | 0 | J | 1248 | 1250 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 249 | JLANU334_22_ | 1.000 | 1.000 | 0 | J | 1250 | 1247 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 250 | JLANU334_23_ | 1.000 | 1.000 | 0 | J | 1247 | 1251 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 251 | JLANU334_24_ | 1.000 | 1.000 | 0 | J | 1251 | 1246 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 252 | JLANU334_25_ | 1.000 | 1.000 | 0 | J | 1246 | 1252 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 253 | JLANU334_26_ | 4.000 | 4.000 | 0 | J | 1252 | 1244 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 254 | JLANU334_27_ | 4.000 | 4.000 | 0 | J | 1244 | 1245 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 255 | JLANU334_28_ | 4.000 | 4.000 | 0 | J | 1245 | 735 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 256 | JLANU334_29_ | 4.000 | 4.000 | 0 | J | 735 | 736 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 257 | JLANU334_30_ | 4.000 | 4.000 | 0 | J | 736 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 258 | JLANU334_31_/ | 4.000 | 4.000 | 0 | J | 1 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 259 | JLANU334_32_/ | 4.000 | 4.000 | 0 | J | 1 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 260 | JLANU334_33_/ | 4.000 | 4.000 | 0 | J | 1 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 261 | JLANU334_34_/ | 4.000 | 4.000 | 0 | J | 1 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 262 | JLANU334_35_/ | 4.000 | 4.000 | 0 | J | 1 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 263 | JLANU334_36_/ | 4.000 | 4.000 | 0 | J | 1 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 264 | JLANU334_37_/ | 4.000 | 4.000 | 0 | J | 1 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 265 | JLANU334_38_/ | 4.000 | 4.000 | 0 | J | 1274 | 1 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA |
RO1R100
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RO1R100 | B1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 655 | H_SKTOCC_ |
| 2 | 695 | O_5V_IN_2 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 956 | RO1R100 | 2.000 | 1.000 | 0 | J | 655 | 695 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RO1R104
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RO1R104 | B1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 678 | +3V_BAT |
| 2 | 693 | +3V_BAT_1 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 957 | RO1R104 | 2.000 | 1.000 | 0 | J | 678 | 693 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RO1R110
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RO1R110 | B1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 696 | O_12V_IN_2 |
| 2 | 198 | O_RSMRST_ |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 960 | RO1R110 | 2.000 | 1.000 | 0 | J | 696 | 198 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RO1R123
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RO1R123 | B1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 706 | +3VSB_ATX |
| 2 | 698 | +AVCC_SIO |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 962 | RO1R123 | 2.000 | 1.000 | 0 | J | 706 | 698 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RO1R143
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RO1R143 | B1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 2 | +3V |
| 2 | 700 | +3V_O1P1 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 963 | RO1R143 | 2.000 | 1.000 | 0 | J | 2 | 700 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RO1R144
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RO1R144 | A1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 681 | O_CHAFANIN2 |
| 2 | 699 | O1_PIN2 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 964 | RO1R144 | 2.000 | 1.000 | 0 | J | 681 | 699 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RO1R148
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RO1R148 | B1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 677 | SIO_LED_PWM_R |
| 2 | 672 | O1_PIN42 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 966 | RO1R148 | 2.000 | 1.000 | 0 | J | 677 | 672 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RO1R159
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RO1R159 | B1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 842 | VCCST_VCCSFR |
| 2 | 702 | +VTT_O1 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 968 | RO1R159 | 2.000 | 1.000 | 0 | J | 842 | 702 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RO1R194
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RO1R194 | A1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 84 | O_PLED |
| 2 | 677 | SIO_LED_PWM_R |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 973 | RO1R194 | 2.000 | 1.000 | 0 | J | 84 | 677 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RO1R199
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RO1R199 | B1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 47 | AUDIO_LED_PWM |
| 2 | 674 | +3V_BAT_2 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 974 | RO1R199 | 2.000 | 1.000 | 0 | J | 47 | 674 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RO1R98
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RO1R98 | B1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 666 | O_SLP_S3__R |
| 2 | 847 | O_PSON__O1 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 975 | RO1R98 | 2.000 | 1.000 | 0 | J | 666 | 847 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
JPANEL
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| JPANEL | A3 | T | 17 | 1 | 5.9 | JP |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 224 | HDLED+ |
| 2 | 223 | PLED+ |
| 3 | 225 | HDLED- |
| 4 | 226 | PLED- |
| 5 | 1 | GND |
| 6 | 227 | PWRBTN__PANEL |
| 7 | 228 | O_RSTCON__PR |
| 8 | 1 | GND |
| 9 | 229 | +5V_FPANEL |
| 10 | 223 | PLED+ |
| 11 | 230 | +5V_SPKO |
| 12 | 1 | GND |
| 13 | 226 | PLED- |
| 14 | 1 | GND |
| 15 | 290 | SPKO |
| 16 | 1 | GND |
| 17 | 291 | O_CASEOPEN |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 46 | JPANEL_1 | 1.000 | 1.000 | 0 | J | 1801 | 224 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 266 | JPANEL_1_2 | 4.000 | 4.000 | 0 | J | 224 | 223 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 267 | JPANEL_2_3 | 4.000 | 4.000 | 0 | J | 223 | 225 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 268 | JPANEL_3_4 | 4.000 | 4.000 | 0 | J | 225 | 226 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 269 | JPANEL_4_5/JP | 4.000 | 4.000 | 0 | J | 226 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 270 | JPANEL_5_6 | 4.000 | 4.000 | 0 | J | 1 | 227 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 271 | JPANEL_6_7 | 4.000 | 4.000 | 0 | J | 227 | 228 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 272 | JPANEL_7_8 | 4.000 | 4.000 | 0 | J | 228 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 273 | JPANEL_8_9 | 4.000 | 4.000 | 0 | J | 1 | 229 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 274 | JPANEL_9_10 | 4.000 | 4.000 | 0 | J | 229 | 223 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 275 | JPANEL_10_11 | 4.000 | 4.000 | 0 | J | 223 | 230 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 276 | JPANEL_11_12 | 4.000 | 4.000 | 0 | J | 230 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 277 | JPANEL_12_13/ | 4.000 | 4.000 | 0 | J | 1 | 226 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 278 | JPANEL_13_14/ | 4.000 | 4.000 | 0 | J | 226 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 279 | JPANEL_14_15/ | 4.000 | 4.000 | 0 | J | 1 | 290 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 280 | JPANEL_15_16/ | 4.000 | 4.000 | 0 | J | 290 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 281 | JPANEL_16_17 | 4.000 | 4.000 | 0 | J | 1 | 291 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 282 | JPANEL_17_1 | 4.000 | 4.000 | 0 | J | 224 | 291 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 |
RPR102
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR102 | F3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1608 | P_VCORE_VCC5_20 |
| 2 | 3 | +5V |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 992 | RPR102 | 2.200 | 1.000 | 0 | J | 1608 | 3 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR114
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR114 | F3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1618 | P_GT_CSREFA_10 |
| 2 | 1658 | P_GT_CSN2A_10 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1002 | RPR114 | 10.00 | 1.000 | 0 | J | 1618 | 1658 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR116
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR116 | F3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1636 | P_VCORE_CSREF_10 |
| 2 | 1327 | P_VCORE_CSN2_10 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1003 | RPR116 | 10.00 | 1.000 | 0 | J | 1636 | 1327 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR120
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR120 | F3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1636 | P_VCORE_CSREF_10 |
| 2 | 1324 | P_VCORE_CSN1_10 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1000 | RPR120 | 10.00 | 1.000 | 0 | J | 1636 | 1324 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR124
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR124 | F3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1618 | P_GT_CSREFA_10 |
| 2 | 1645 | P_GT_CSN1A_10 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1001 | RPR124 | 10.00 | 1.000 | 0 | J | 1618 | 1645 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR126
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR126 | F3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1636 | P_VCORE_CSREF_10 |
| 2 | 1183 | P_VCORE_CSN3_10 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 994 | RPR126 | 10.00 | 1.000 | 0 | J | 1636 | 1183 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR160
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR160 | F2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1686 | P_DRIVER2_VCC_20 |
| 2 | 1690 | P_VCORE_VCC2_R_20 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 989 | RPR160 | 2.200 | 1.000 | 0 | J | 1686 | 1690 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR165
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR165 | F2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1677 | P_VCORE_BST2_20 |
| 2 | 1676 | P_VCORE_BST2_R_20 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 632 | RPR165 | 1.000 | 1.000 | 0 | J | 1677 | 1676 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR166
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR166 | F2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1691 | P_VCORE_BST3_20 |
| 2 | 1692 | P_VCORE_BST3_R_20 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 633 | RPR166 | 1.000 | 1.000 | 0 | J | 1691 | 1692 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR167
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR167 | F2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1687 | P_DRIVER3_VCC_20 |
| 2 | 1688 | P_VCORE_VCC3_R_20 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 990 | RPR167 | 2.200 | 1.000 | 0 | J | 1687 | 1688 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR170
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR170 | F2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1682 | P_DRIVER1_VCC_20 |
| 2 | 1678 | P_VCORE_VCC1_R_20 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 991 | RPR170 | 2.200 | 1.000 | 0 | J | 1682 | 1678 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR171
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR171 | F2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1672 | P_VCORE_BST1_20 |
| 2 | 1673 | P_VCORE_BST1_R_20 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 634 | RPR171 | 1.000 | 1.000 | 0 | J | 1672 | 1673 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR174
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR174 | F2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1675 | P_VCORE_HG1_20 |
| 2 | 1693 | P_VCORE_R_HG1_20 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 635 | RPR174 | 1.000 | 1.000 | 0 | J | 1675 | 1693 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR175
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR175 | E2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1311 | P_VCORE_HG2_20 |
| 2 | 1313 | P_VCORE_R_HG2_20 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 636 | RPR175 | 1.000 | 1.000 | 0 | J | 1311 | 1313 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR176
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR176 | E2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1315 | P_VCORE_HG3_20 |
| 2 | 1317 | P_VCORE_R_HG3_20 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 637 | RPR176 | 1.000 | 1.000 | 0 | J | 1315 | 1317 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR177
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR177 | E2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1312 | P_VCORE_PH1_SNU_10 |
| 2 | 1 | GND |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 638 | RPR177 | 1.000 | 1.000 | 0 | J | 1312 | 1 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR178
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR178 | E2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1318 | P_VCORE_PH2_SNU_10 |
| 2 | 1 | GND |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 639 | RPR178 | 1.000 | 1.000 | 0 | J | 1318 | 1 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR179
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR179 | D2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1200 | P_VCORE_PH3_SNU_10 |
| 2 | 1 | GND |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 640 | RPR179 | 1.000 | 1.000 | 0 | J | 1200 | 1 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR183
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR183 | F3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1519 | P_+VCCIO_PG_10 |
| 2 | 1225 | P_VCORE_EN_10 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 907 | RPR183 | 2.000 | 1.000 | 0 | J | 1519 | 1225 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR184
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR184 | F3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1602 | P_SVID_DATA |
| 2 | 1341 | H_SVID_DATA |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 999 | RPR184 | 10.00 | 1.000 | 0 | J | 1602 | 1341 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR185
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR185 | F3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1643 | H_SVID_ALERT_ |
| 2 | 1607 | P_SVID_ALERT_ |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 908 | RPR185 | 2.000 | 1.000 | 0 | J | 1643 | 1607 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR188
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR188 | F3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1337 | P_VCORE_VRHOT__R_10 |
| 2 | 1610 | P_VCORE_VRHOT__10 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 909 | RPR188 | 2.000 | 1.000 | 0 | J | 1337 | 1610 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR190
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR190 | F3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1593 | P_SMB_CLK_4 |
| 2 | 1590 | S_SMBCLK_MAIN |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 910 | RPR190 | 2.000 | 1.000 | 0 | J | 1593 | 1590 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR192
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR192 | F3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1589 | P_SMB_DATA_4 |
| 2 | 1591 | S_SMBDATA_MAIN |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 911 | RPR192 | 2.000 | 1.000 | 0 | J | 1589 | 1591 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR206
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR206 | F2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1651 | P_GT_DRIVER_VCC_20 |
| 2 | 1650 | P_GT_VCC1_R_20 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 984 | RPR206 | 2.200 | 1.000 | 0 | J | 1651 | 1650 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR208
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR208 | F3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1640 | P_GT_BST1_20 |
| 2 | 1641 | P_GT_BST1_R_20 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 648 | RPR208 | 1.000 | 1.000 | 0 | J | 1640 | 1641 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR209
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR209 | F2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1654 | P_GT_DRIVER2_VCC_20 |
| 2 | 1666 | P_GT_VCC2_R_20 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 985 | RPR209 | 2.200 | 1.000 | 0 | J | 1654 | 1666 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR211
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR211 | F2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1661 | P_GT_BST2_20 |
| 2 | 1660 | P_GT_BST2_R_20 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 649 | RPR211 | 1.000 | 1.000 | 0 | J | 1661 | 1660 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR212
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR212 | F2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1648 | P_GT_R_HG1_20 |
| 2 | 1655 | P_GT_R_HG1_R_20 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 650 | RPR212 | 1.000 | 1.000 | 0 | J | 1648 | 1655 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR213
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR213 | F2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1667 | P_GT_R_HG2_20 |
| 2 | 1668 | P_GT_R_HG2_R_20 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 651 | RPR213 | 1.000 | 1.000 | 0 | J | 1667 | 1668 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR214
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR214 | F2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1663 | P_GT_PH1_SNU_10 |
| 2 | 1 | GND |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 652 | RPR214 | 1.000 | 1.000 | 0 | J | 1663 | 1 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR215
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR215 | F2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1669 | P_GT_PH2_SNU_10 |
| 2 | 1 | GND |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 653 | RPR215 | 1.000 | 1.000 | 0 | J | 1669 | 1 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR219
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR219 | F3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1638 | P_GT_BOOT_R |
| 2 | 1344 | P_CPU_GND_GT |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 918 | RPR219 | 2.000 | 1.000 | 0 | J | 1638 | 1344 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR232
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR232 | F3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1637 | P_VCORE_BOOT_R |
| 2 | 1616 | P_CPU_GND_VCORE |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 922 | RPR232 | 2.000 | 1.000 | 0 | J | 1637 | 1616 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR304
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR304 | C3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1203 | P_+VCCIO_EN_10 |
| 2 | 1551 | P_+VDDQ_PG_10 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 924 | RPR304 | 2.000 | 1.000 | 0 | J | 1203 | 1551 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR503
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR503 | F4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1503 | P_+VDDQ_3933_OV_10 |
| 2 | 1499 | P_VDDQ_FB_10 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 927 | RPR503 | 2.000 | 1.000 | 0 | J | 1503 | 1499 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR532
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR532 | E4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1491 | P_VDDQ_SNB |
| 2 | 1 | GND |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 683 | RPR532 | 1.000 | 1.000 | 0 | J | 1491 | 1 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR534
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR534 | F4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1511 | P_VDDQ_BOOT_20 |
| 2 | 1497 | P_VDDQ_BOOT_R_20 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 684 | RPR534 | 1.000 | 1.000 | 0 | J | 1511 | 1497 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR536
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR536 | F4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1496 | P_VDDQ_VCC_20 |
| 2 | 1498 | P_VDDQ_VCC_P_20 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 986 | RPR536 | 2.200 | 1.000 | 0 | J | 1496 | 1498 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR538
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR538 | F4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1501 | P_VDDQ_FB_C_10 |
| 2 | 1502 | P_VDDQ_FB_SHORTPIN |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 995 | RPR538 | 10.00 | 1.000 | 0 | J | 1501 | 1502 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR539
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR539 | F4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1494 | P_VDDQ_UGATE_20 |
| 2 | 1493 | P_VDDQ_UGATE_M_20 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 685 | RPR539 | 1.000 | 1.000 | 0 | J | 1494 | 1493 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR543
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR543 | C4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 2 | +3V |
| 2 | 902 | P_VTT_DDR_CTRL_10 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 996 | RPR543 | 10.00 | 1.000 | 0 | J | 2 | 902 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR570
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR570 | C4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 924 | DDR_VTT_CNTL_B_R_10 |
| 2 | 951 | H_DDR_VTT_CNTL |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 933 | RPR570 | 2.000 | 1.000 | 0 | J | 924 | 951 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR711
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR711 | D1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1220 | P_VCCSA_FB_10 |
| 2 | 841 | P_+VCCSA_3933_OV_10 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 935 | RPR711 | 2.000 | 1.000 | 0 | J | 1220 | 841 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR720
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR720 | B4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 423 | +5VSB |
| 2 | 426 | P_+1_0V_A_LP__10 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 987 | RPR720 | 2.200 | 1.000 | 0 | J | 423 | 426 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR737
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR737 | B4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 434 | P_+1_0V_A_BST_R_20 |
| 2 | 431 | P_+1_0V_A_BST_20 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 993 | RPR737 | 4.700 | 1.000 | 0 | J | 434 | 431 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR757
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR757 | D2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1226 | P_VCCSA_UGATE_20 |
| 2 | 1201 | P_VCCSA_UGATE_M_20 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 708 | RPR757 | 1.000 | 1.000 | 0 | J | 1226 | 1201 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR758
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR758 | D1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1221 | P_VCCSA_FB_C_10 |
| 2 | 1218 | P_VCCSA_FB_SHORTPIN |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 997 | RPR758 | 10.00 | 1.000 | 0 | J | 1221 | 1218 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR761
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR761 | D2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1204 | P_VCCSA_VCC_20 |
| 2 | 1316 | +12V_CPU |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 988 | RPR761 | 2.200 | 1.000 | 0 | J | 1204 | 1316 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR763
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR763 | D2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1202 | P_VCCSA_SNB |
| 2 | 1 | GND |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 709 | RPR763 | 1.000 | 1.000 | 0 | J | 1202 | 1 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR765
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR765 | D2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1207 | P_VCCSA_BOOT_20 |
| 2 | 1205 | P_VCCSA_BOOT_R_20 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 710 | RPR765 | 1.000 | 1.000 | 0 | J | 1207 | 1205 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR766
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR766 | D1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1224 | P_VCCSA_FB_R_SHORTPIN |
| 2 | 1218 | P_VCCSA_FB_SHORTPIN |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 998 | RPR766 | 10.00 | 1.000 | 0 | J | 1224 | 1218 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RPR819
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RPR819 | F3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1203 | P_+VCCIO_EN_10 |
| 2 | 1582 | P_+12V_3V_EN_10 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 945 | RPR819 | 2.000 | 1.000 | 0 | J | 1203 | 1582 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
JSPDIFUT
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| JSPDIFUT | A1 | T | 3 | 3 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 3 | +5V |
| 2 | 85 | A_SPDIFO_HEADER |
| 3 | 1 | GND |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 47 | JSPDIFUT_1 | 1.000 | 1.000 | 0 | J | 1794 | 3 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 48 | JSPDIFUT_2 | 1.000 | 1.000 | 0 | J | 1795 | 85 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 49 | JSPDIFUT_3 | 1.000 | 1.000 | 0 | J | 1796 | 1 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 356 | JSPDIFUT_1_2 | 4.000 | 4.000 | 0 | J | 3 | 85 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 357 | JSPDIFUT_2_3 | 4.000 | 4.000 | 0 | J | 85 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 358 | JSPDIFUT_3_1/ | 4.000 | 4.000 | 0 | J | 3 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 |
RSR130
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RSR130 | A4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 346 | N97614572 |
| 2 | 1 | GND |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 946 | RSR130 | 2.000 | 1.000 | 0 | J | 346 | 1 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RSR132
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RSR132 | A4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 373 | P_VR_READY_10 |
| 2 | 372 | S_SYSPWROK |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 947 | RSR132 | 2.000 | 1.000 | 0 | J | 373 | 372 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RSR153
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RSR153 | B3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 519 | +1_0V_A_XCLK_BIAS |
| 2 | 501 | +1_0V_A |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 948 | RSR153 | 2.000 | 1.000 | 0 | J | 519 | 501 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RSR154
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RSR154 | A3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 218 | +1_0V_A_VCCAPLL |
| 2 | 501 | +1_0V_A |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 949 | RSR154 | 2.000 | 1.000 | 0 | J | 218 | 501 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RSR155
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RSR155 | B4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 489 | +1_0V_A_VCCAMPHYPLL |
| 2 | 501 | +1_0V_A |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 950 | RSR155 | 2.000 | 1.000 | 0 | J | 489 | 501 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RSR156
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RSR156 | B4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 460 | +1_0V_A_VCCMIPIPLL |
| 2 | 501 | +1_0V_A |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 951 | RSR156 | 2.000 | 1.000 | 0 | J | 460 | 501 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RSR1617
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RSR1617 | D2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 264 | S_GPP_A18 |
| 2 | 1197 | S_TCC_EN_ |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 952 | RSR1617 | 2.000 | 1.000 | 0 | J | 264 | 1197 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RSR1623
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RSR1623 | A3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 319 | ME_UNLOCK |
| 2 | 233 | S_HD_SDOUT_R |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 953 | RSR1623 | 2.000 | 1.000 | 0 | J | 319 | 233 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RSR1640
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RSR1640 | A4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 200 | S_PWROK |
| 2 | 772 | O_PWROK |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 955 | RSR1640 | 2.000 | 1.000 | 0 | J | 200 | 772 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RSR240
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RSR240 | B3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1 | GND |
| 2 | 524 | CPU_VSS_AB10 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 958 | RSR240 | 2.000 | 1.000 | 0 | J | 1 | 524 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RSR241
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RSR241 | B3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 522 | CPU_VSS_AB11 |
| 2 | 1 | GND |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 959 | RSR241 | 2.000 | 1.000 | 0 | J | 522 | 1 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RSR56
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RSR56 | A4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 350 | S_D4_RESET_ |
| 2 | 1408 | S_D4_RESET__R |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 965 | RSR56 | 2.000 | 1.000 | 0 | J | 350 | 1408 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RSR632
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RSR632 | D2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1338 | P_VCORE_VRSHDN_10 |
| 2 | 1194 | N45021399 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 967 | RSR632 | 2.000 | 1.000 | 0 | J | 1338 | 1194 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RSR67
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RSR67 | A3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 234 | +3VSB_HDA |
| 2 | 634 | +3VSB |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 969 | RSR67 | 2.000 | 1.000 | 0 | J | 234 | 634 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RSR7
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RSR7 | A4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 302 | VCCPGPPD |
| 2 | 634 | +3VSB |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 970 | RSR7 | 2.000 | 1.000 | 0 | J | 302 | 634 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RSR80
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RSR80 | A3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 198 | O_RSMRST_ |
| 2 | 238 | S_DPWROK |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 971 | RSR80 | 2.000 | 1.000 | 0 | J | 198 | 238 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RSR81
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RSR81 | A2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 634 | +3VSB |
| 2 | 179 | +3VSB_ADV |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 972 | RSR81 | 2.000 | 1.000 | 0 | J | 634 | 179 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
LUF31
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| LUF31 | C4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1229 | +5VSB_DUAL |
| 2 | 965 | +5V_USB3_P12 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2565 | LUF31 | 1.000 | 1.000 | 0 | J | 1229 | 965 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
LUF32
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| LUF32 | D1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1229 | +5VSB_DUAL |
| 2 | 1274 | +5V_USB3_P34 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2566 | LUF32 | 1.000 | 1.000 | 0 | J | 1229 | 1274 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
LUF4
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| LUF4 | F1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1229 | +5VSB_DUAL |
| 2 | 1713 | +5V_USB_P78 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2567 | LUF4 | 1.000 | 1.000 | 0 | J | 1229 | 1713 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
LUF5
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| LUF5 | A3 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1229 | +5VSB_DUAL |
| 2 | 203 | +5V_USB_P910 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2568 | LUF5 | 1.000 | 1.000 | 0 | J | 1229 | 203 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
LUF6
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| LUF6 | A2 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 1229 | +5VSB_DUAL |
| 2 | 187 | +5V_USB_P1112 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2569 | LUF6 | 1.000 | 1.000 | 0 | J | 1229 | 187 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RUR1
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RUR1 | F1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 790 | +5V_USB_P78_R |
| 2 | 1713 | +5V_USB_P78 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 980 | RUR1 | 2.000 | 1.000 | 0 | J | 790 | 1713 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RUR2
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RUR2 | C1 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 739 | +5V_USB_P34_R |
| 2 | 1274 | +5V_USB3_P34 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 981 | RUR2 | 2.000 | 1.000 | 0 | J | 739 | 1274 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
RUR3
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| RUR3 | A4 | T | 2 | 2 | 100.0 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 309 | +5V_USB_P1112_R |
| 2 | 187 | +5V_USB_P1112 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 982 | RUR3 | 2.000 | 1.000 | 0 | J | 309 | 187 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 |
JUSB1112
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| JUSB1112 | A2 | T | 9 | 2 | 22.2 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 187 | +5V_USB_P1112 |
| 2 | 187 | +5V_USB_P1112 |
| 3 | 188 | S_USB_PN11 |
| 4 | 190 | S_USB_PN10 |
| 5 | 189 | S_USB_PP11 |
| 6 | 191 | S_USB_PP10 |
| 7 | 1 | GND |
| 8 | 1 | GND |
| 9 | 192 | NC_1941 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 51 | JUSB1112_1 | 1.000 | 1.000 | 0 | J | 1799 | 187 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 372 | JUSB1112_1_2/ | 4.000 | 4.000 | 0 | J | 187 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 373 | JUSB1112_2_3 | 4.000 | 4.000 | 0 | J | 187 | 188 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 374 | JUSB1112_3_4 | 4.000 | 4.000 | 0 | J | 188 | 190 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 375 | JUSB1112_4_5 | 4.000 | 4.000 | 0 | J | 190 | 189 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 376 | JUSB1112_5_6 | 4.000 | 4.000 | 0 | J | 189 | 191 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 377 | JUSB1112_6_7 | 4.000 | 4.000 | 0 | J | 191 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 378 | JUSB1112_7_8/ | 4.000 | 4.000 | 0 | J | 1 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 379 | JUSB1112_8_9 | 4.000 | 4.000 | 0 | J | 1 | 192 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 380 | JUSB1112_9_1 | 4.000 | 4.000 | 0 | J | 187 | 192 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 |
JUSB312
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| JUSB312 | C4 | T | 19 | 2 | 10.5 |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 965 | +5V_USB3_P12 |
| 2 | 964 | S_U3RXDN1 |
| 3 | 963 | S_U3RXDP1 |
| 4 | 1 | GND |
| 5 | 960 | S_U3TXDN1 |
| 6 | 959 | S_U3TXDP1 |
| 7 | 1 | GND |
| 8 | 956 | S_U2DN1 |
| 9 | 955 | S_U2DP1 |
| 10 | 1 | GND |
| 11 | 953 | S_U2DP2 |
| 12 | 954 | S_U2DN2 |
| 13 | 1 | GND |
| 14 | 957 | S_U3TXDP2 |
| 15 | 958 | S_U3TXDN2 |
| 16 | 1 | GND |
| 17 | 961 | S_U3RXDP2 |
| 18 | 962 | S_U3RXDN2 |
| 19 | 965 | +5V_USB3_P12 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 52 | JUSB312_1 | 1.000 | 1.000 | 0 | J | 1804 | 965 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 381 | JUSB312_1_2 | 4.000 | 4.000 | 0 | J | 965 | 964 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 382 | JUSB312_2_3 | 4.000 | 4.000 | 0 | J | 964 | 963 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 383 | JUSB312_3_4 | 4.000 | 4.000 | 0 | J | 963 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 384 | JUSB312_4_5 | 4.000 | 4.000 | 0 | J | 1 | 960 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 385 | JUSB312_5_6 | 4.000 | 4.000 | 0 | J | 960 | 959 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 386 | JUSB312_6_7 | 4.000 | 4.000 | 0 | J | 959 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 387 | JUSB312_7_8 | 4.000 | 4.000 | 0 | J | 1 | 956 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 388 | JUSB312_8_9 | 4.000 | 4.000 | 0 | J | 956 | 955 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 389 | JUSB312_9_10 | 4.000 | 4.000 | 0 | J | 955 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 390 | JUSB312_10_1 | 4.000 | 4.000 | 0 | J | 1 | 953 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 391 | JUSB312_11_1 | 4.000 | 4.000 | 0 | J | 953 | 954 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 392 | JUSB312_12_1 | 4.000 | 4.000 | 0 | J | 954 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 393 | JUSB312_13_1 | 4.000 | 4.000 | 0 | J | 1 | 957 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 394 | JUSB312_14_1 | 4.000 | 4.000 | 0 | J | 957 | 958 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 395 | JUSB312_15_1 | 4.000 | 4.000 | 0 | J | 958 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 396 | JUSB312_16_1 | 4.000 | 4.000 | 0 | J | 1 | 961 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 397 | JUSB312_17_1 | 4.000 | 4.000 | 0 | J | 961 | 962 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 398 | JUSB312_18_1 | 4.000 | 4.000 | 0 | J | 962 | 965 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 399 | JUSB312_19_1/ | 4.000 | 4.000 | 0 | J | 965 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA |
JUSB910
| Device | Loc | Side | Total Pin | Tested | Coverage (%) | Comment |
|---|---|---|---|---|---|---|
| JUSB910 | A3 | T | 9 | 2 | 22.2 | N |
| Pin | Nail | Net Name |
|---|---|---|
| 1 | 203 | +5V_USB_P910 |
| 2 | 203 | +5V_USB_P910 |
| 3 | 204 | S_USB_PN9 |
| 4 | 202 | S_USB_PN8 |
| 5 | 205 | S_USB_PP9 |
| 6 | 206 | S_USB_PP8 |
| 7 | 1 | GND |
| 8 | 1 | GND |
| 9 | 207 | NC_1942 |
| Step | Name | BOM_V | EXP_V | Mode | Type | HiN | LoN | G1 | HVal | LVal | Mean | StdDev | Cp | Cpk | USL | LSL | Message |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 53 | JUSB910_1 | 1.000 | 1.000 | 0 | J | 1800 | 203 | 0 | 1.100 | 0.900 | 1.000 | 0.0000 | 99999 | 99999 | 1.1000 | 0.9000 | |
| 447 | JUSB910_1_2/N | 4.000 | 4.000 | 0 | J | 203 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 448 | JUSB910_2_3 | 4.000 | 4.000 | 0 | J | 203 | 204 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 449 | JUSB910_3_4 | 4.000 | 4.000 | 0 | J | 204 | 202 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 450 | JUSB910_4_5 | 4.000 | 4.000 | 0 | J | 202 | 205 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 451 | JUSB910_5_6 | 4.000 | 4.000 | 0 | J | 205 | 206 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 452 | JUSB910_6_7 | 4.000 | 4.000 | 0 | J | 206 | 1 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 453 | JUSB910_7_8/N | 4.000 | 4.000 | 0 | J | 1 | 0 | 0 | 4.400 | 3.600 | NA | NA | NA | NA | NA | NA | |
| 454 | JUSB910_8_9 | 4.000 | 4.000 | 0 | J | 1 | 207 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 | |
| 455 | JUSB910_9_1 | 4.000 | 4.000 | 0 | J | 203 | 207 | 0 | 4.400 | 3.600 | 4.000 | 0.0000 | 99999 | 99999 | 4.4000 | 3.6000 |